The present invention relates to packet switches and, in particular, to configurable frame processing pipelines in packet switches.
Packet switches are the building blocks for many network devices and switch fabric architectures, receiving data frames on ingress ports, temporarily storing the frames in a shared memory or datapath crossbar, and transmitting each frame on one or more egress ports. Some packet switches implement only very basic functionality, e.g., simple forwarding of received frames, while others provide relatively more sophisticated frame processing capabilities, e.g., implementing the terms of a service level agreement.
Regardless of the level of sophistication, packet switches typically include a resource that determines how each frame should be handled with reference to information stored in the frame header, i.e., a frame processing pipeline. Conventionally, frame processing pipelines are implemented as complex, but relatively static, functions that perform predetermined, fixed logical operations on frame header data. This conventional approach makes it difficult implement a switch that dynamically handles different types of data frames. In addition, the static nature of such designs presents significant obstacles to fixing bugs or updating designs to incorporate new functionality, often requiring significant redesign.